Feasibility of monolithic and 3D-stacked DC-DC converters for microprocessors in 90nm technology generation

被引：40

作者：

Schrom, G ^{[1
]}

Hazucha, P ^{[1
]}

Hahn, JH ^{[1
]}

Kursun, V ^{[1
]}

Gardner, D ^{[1
]}

Narendra, S ^{[1
]}

Karnik, T ^{[1
]}

De, V ^{[1
]}

机构：

[1] Circuit Res, Intel Labs, Hillsboro, OR 97124 USA

来源：

ISLPED '04: PROCEEDINGS OF THE 2004 INTERNATIONAL SYMPOSIUM ON LOW POWER ELECTRONICS AND DESIGN | 2004年

关键词：

3-D integration; DC-DC converter; integrated magnetics; on-die switching converter; power delivery;

D O I：

10.1145/1013235.1013302

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Rapidly increasing input current of microprocessors resulted in rising cost and motherboard real estate occupied by decoupling capacitors and power routing. We show by analysis that an on-die switching DC-DC converter is feasible for future microprocessor power delivery. The DC-DC converter can be fabricated in an existing CMOS process (90nm-180nm) with a back-end thin-film inductor module. We show that 85% efficiency and 10% output voltage droop can be achieved for 4:1, 3:1, and 2:1 conversion ratios, area overhead of 5% and no additional on-die decoupling capacitance. A 4:1 conversion results in 3.4x smaller input current and 6.8x smaller external decoupling.

引用

页码：263 / 268

页数：6

共 9 条

[1] High-frequency microinductors with amorphous magnetic ground planes [J].