A 98 mm(2) die size 3.3-V 64-Mb flash memory with FN-NOR type four-level cell

被引：13

作者：

Ohkawa, M

Sugawara, H

Sudo, N

Tsukiji, M

Nakagawa, K

Kawata, M

Oyama, K

Takeshima, T

Ohya, S

机构：

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 1996年 / 31卷 / 11期

关键词：

D O I：

10.1109/JSSC.1996.542302

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In order to realize high-capacity and low-cost flash memory, we have developed a 64-Mb hash memory with multilevel cell operation scheme, The 64-Mb flash memory has been Select achieved in a 98 mm(2) die size by using four-level per cell operation scheme, NOR type cell array, and 0.4-mu m CMOS technology, Using an FN type program/erase cell allows a single Word 3.3 V supply voltage. In order to establish fast programming operation using Fowler-Nordheim (FN)-NOR type memory cell, we have developed a highly parallel multilevel programming technology, The drain voltage controlled multilevel programming (DCMP) scheme, the parallel multilevel verify (PMV) circuit, and the compact multilevel sense-amplifier (CMS) have been implemented to achieve 128 b parallel programming and 6.3 mu s/Byte programming speed.

引用

页码：1584 / 1589

页数：6