μI/O architecture for 0.13-μm wide-voltage-range system-on-a-package (SoP) designs

被引：13

作者：

Kanno, Y ^{[1
]}

Mizuno, H ^{[1
]}

Oodaira, N ^{[1
]}

Yasu, Y ^{[1
]}

Yanagisawa, K ^{[1
]}

机构：

[1] Hitachi Ltd, Cent Res Lab, Kokubunji, Tokyo 1858601, Japan

来源：

2002 SYMPOSIUM ON VLSI CIRCUITS, DIGEST OF TECHNICAL PAPERS | 2002年

关键词：

D O I：

10.1109/VLSIC.2002.1015075

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

To provide low-cost system solutions together with a 0.13mum dual-t(ox) CMOS and multi-chip package (MCP) technologies, a new, so-called muI/O architecture was developed. The muI/O provides a common interface throughout the module and, thus, enables high design reusability and hierarchical I/O design for MCPs. The muI/O includes a signal-level converter for integrating wide-voltage-range (0.75-1.3 or 1.5-3.6V) circuit blocks, and a signal wall function for turning off each block independently-without invalid signal transmission-by using an internal power switch.

引用

页码：168 / 169

页数：2