Value-sensitive automatic code specialization for embedded software

被引:3
作者
Chung, EY [1 ]
Benini, L
DeMicheli, G
Luculli, G
Carilli, M
机构
[1] Stanford Univ, Comp Syst Lab, Stanford, CA 94305 USA
[2] Univ Bologna, Dept Elect Engn & Comp Sci, I-40136 Bologna, Italy
[3] STMicroelectron, AST, F-38019 Grenoble, France
基金
美国国家科学基金会;
关键词
code size; common value; embedded software; energy consumption; framework; partial evaluation; performance; search space; specialization; value profiling;
D O I
10.1109/TCAD.2002.801096
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 [计算机科学与技术];
摘要
The objective of this work is to create a framework for the optimization of embedded software. We present algorithms and a tool flow to reduce the computational effort of programs, using value profiling and partial evaluation. Such a reduction translates into both energy savings and average-case performance improvement, while preserving a tolerable increase of worst case performance and code size. Our tool reduces the computational effort by specializing frequently executed procedures for the most common values of their parameters. The most effective specializations are automatically searched and identified, and the code is transformed through partial evaluation. Experimental results show that their technique improves both energy consumption and performance of the source code up to more than a factor of two, in average about 35% over the original program. Also, their automatic search engine greatly reduces code optimization time with respect to exhaustive search.
引用
收藏
页码:1051 / 1067
页数:17
相关论文
共 55 条
[1]
ANDERSEN LO, 1994, THESIS DIKU U COPENH
[2]
ARAUJO G, 1998, P ACM TODAES T DES A, V3, P136
[3]
COMPILER TRANSFORMATIONS FOR HIGH-PERFORMANCE COMPUTING [J].
BACON, DF ;
GRAHAM, SL ;
SHARP, OJ .
ACM COMPUTING SURVEYS, 1994, 26 (04) :345-420
[4]
BALL T, 1992, POPL 92, P59
[5]
BEINI L, 1997, DYNAMIC POWER MANAGE
[6]
System-level power optimization: Techniques and tools [J].
Benini, L ;
De Micheli, G .
ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS, 2000, 5 (02) :115-192
[7]
Value profiling [J].
Calder, B ;
Feller, P ;
Eustace, A .
THIRTIETH ANNUAL IEEE/ACM INTERNATIONAL SYMPOSIUM ON MICROARCHITECTURE, PROCEEDINGS, 1997, :259-269
[8]
Calder Brad, 1999, Journal of Instruction Level Parallelism, V1
[9]
CATTHOOR F, 1998, LOW POWER CMOS DESIG
[10]
Catthoor Francky, 1998, CUSTOM MEMORY MANAGE