Polished TFT's: Surface roughness reduction and its correlation to device performance improvement

Chemical-mechanical polishing (CMP) has been applied to the fabrication of n-channel polysilicon thin film transistors (poly-Si TFT's), Three different polishing conditions are compared: 1) polishing before; 2) polishing after; and 3) both polishing before and after the a-Si recrystallization. Devices with no polishing act as control samples. Experiments consistently reveal that devices with post-anneal polishing exhibit the best performance. Two-fold improvement of drain current is attributed to the smoother active polysilicon surface, The electrical characteristics of a post-anneal polished TFT in terms of held effect mobility mu(FE), threshold voltage V-T, and subthreshold swing S can be further improved if hydrogenation is employed. It is also found that a large decrease in the poly-Si surface roughness leads to higher dielectric breakdown strength and improved short-channel effects. Atomic force microscopy (AFM) and transmission electron microscopy (TEM) results are presented and correlated with electrical results.