Energy dissipation in general purpose microprocessors

被引:297
作者
Gonzalez, R
Horowitz, M
机构
[1] Computer Systems Laboratory, Stanford University, Stanford
关键词
D O I
10.1109/4.535411
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper we investigate possible ways to improve the energy efficiency of a general purpose microprocessor. We show that the energy of a processor depends on its performance, so we chose the energy-delay product to compare different processors. To improve the energy-delay product we explore methods of reducing energy consumption that do not lead to performance loss (i.e., wasted energy), and explore methods to reduce delay by exploiting instruction level parallelism. We found that careful design reduced the energy dissipation by almost 25%, Pipelining can give approximately a 2x improvement in energy-delay product, Superscalar issue, however, does not improve the energy-delay product any further since the overhead required offsets the gains in performance. Further improvements will be hard to come by since a large fraction of the energy (50-80%) is dissipated in the clock network and the on-chip memories, Thus, the efficiency of processors will depend more on the technology being used and the algorithm chosen by the programmer than the micro-architecture.
引用
收藏
页码:1277 / 1284
页数:8
相关论文
共 19 条
[1]  
AMRUTUR BS, 1994, S LOW POW EL IEEE OC, P92
[2]  
BECHADE R, 1994, ISSCC, P208
[3]  
BIGGSET T, 1994, S LOW POW EL IEEE SO, V1, P12
[4]  
BOWHILL WJ, 1995, IEEE INT SOL STAT CI, P182
[5]  
CHAMAS A, 1995, ISSCC, P178
[6]   LOW-POWER CMOS DIGITAL DESIGN [J].
CHANDRAKASAN, AP ;
SHENG, S ;
BRODERSEN, RW .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1992, 27 (04) :473-484
[7]  
Chen Z., 1994, SOIL MECH, V1st ed., P56
[8]  
COLWELL R, 1995, ISSCC FEB, P176
[9]  
GORDON BM, 1994, INT CONF ACOUST SPEE, P409
[10]  
Hennessy JL., 1990, COMPUTER ARCHITECTUR