Readout electronics architecture and packaging for the CDF silicon upgrade

被引:8
作者
GarciaSciveres, M
机构
[1] Lawrence Berkeley Natl. Laboratory, MS 50B-5239, Berkeley, CA 94720
关键词
D O I
10.1016/S0168-9002(97)00248-9
中图分类号
TH7 [仪器、仪表];
学科分类号
0804 ; 080401 ; 081102 ;
摘要
The CDF Collaboration is replacing its silicon vertex detector (SVX') with an enhanced, completely new detector (SVXII). The SVXII design seeks to improve upon SVX' in many aspects simultaneously. Unlike SVX', SVXII information will be used for a second level trigger, demanding the ability to read out the detector at a very high rate. Additionally, the interaction period will now be significantly shorter than the lowest level trigger latency, which requires the use of a data pipeline in the front end. A desire for greater acceptance than SVX' confines the SVXII readout electronics to be directly on active sensor area. This demands small size (high interconnection density) and low mass, while at the same time the faster electronics call for improved thermal performance. New ''deadtimeless'' readout electronics and packaging to meet the above needs are discussed in this article. Preliminary results on performance of prototypes are presented.
引用
收藏
页码:375 / 379
页数:5
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