Modeling of grain boundary barrier modulation in ZnO invisible thin film transistors

被引:64
作者
Hossain, FM
Nishii, J
Takagi, S
Sugihara, T
Ohtomo, A
Fukumura, T
Koinuma, H
Ohno, H
Kawasaki, M
机构
[1] Tohoku Univ, Mat Res Inst, Aoba Ku, Sendai, Miyagi 9808577, Japan
[2] Tokyo Inst Technol, Yokohama, Kanagawa 2268503, Japan
[3] Tohoku Univ, Res Inst Elect Commun, Aoba Ku, Sendai, Miyagi 9808577, Japan
[4] Sharp Co Ltd, Abeno Ku, Osaka 5458522, Japan
[5] NIMS, COMET, Tsukuba, Ibaraki 3050044, Japan
关键词
grain boundary; modeling; ZnO; thin film transistors;
D O I
10.1016/j.physe.2003.11.149
中图分类号
TB3 [工程材料学];
学科分类号
0805 ; 080502 ;
摘要
We model grain boundaries (GBs) for polycrystalline ZnO thin film transistors (TFTs). Experimental result shows a non-linear increase of drain current and gradual enhancement of field effect mobility with increasing gate bias. Our initial single GB model was unable to explain the experimentally obtained results, where we considered the peak defect distribution at the mid gap. Realizing from the experimentally obtained results, we remodeled the grain boundary considering the peak distribution close to the conduction band, which then better replicates the experimental observation. We describe here the transfer characteristic of experimental ZnO TFT in linear region with calculated potential profiles. Appropriate grain boundary modeling signifies that the slower decrease in potential barrier in grain boundary with applied gate voltage is responsible for such non-linear changes in drain current and gradual enhancement of mobility. (C) 2003 Elsevier B.V. All rights reserved.
引用
收藏
页码:911 / 915
页数:5
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