A new simplified multilevel inverter topology for dc-ac conversion

被引:203
作者
Ceglia, Gerardo [1 ]
Guzman, Victor
Sanchez, Carlos
Ibanez, Fernando
Walter, Julio
Gimenez, Maria I.
机构
[1] Univ Simon Bolivar, Caracas 1080A, Venezuela
[2] Univ Politecn Valencia, Dept Elect Engn, E-46071 Valencia, Spain
关键词
capacitor clamped; diode clamped; field programmable gate array (FPGA); H-bridge; multilevel inverter;
D O I
10.1109/TPEL.2006.880303
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Multilevel converters offer high power capability, associated with lower output harmonics and lower commutation losses. Their main disadvantage is their complexity, requiring a great number of power devices and passive components, and a rather complex control circuitry. This work reports a new multilevel inverter topology using an H-bridge output stage with a bidirectional auxiliary switch. The new topology produces a significant reduction in the number of power devices and capacitors required to implement a multilevel output. The new topology is used in the design of a five-level inverter; only five controlled switches, eight diodes, and two capacitors are required to implement the five-level inverter using the proposed topology. The new topology achieves a 37.5% reduction in the number of main power switches required (five in the new against eight in any of the other three configurations) and uses no more diodes or capacitors that the second best topology in the literature, the Asymmetric Cascade configuration. Additionally, the dedicated modulator circuit required for multilevel inverter operation is implemented using a FPGA circuit, reducing overall system cost and complexity. Theoretical predictions are validated using simulation in SPICE, and satisfactory circuit operation is proved with experimental tests performed on a laboratory prototype.
引用
收藏
页码:1311 / 1319
页数:9
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