Impact of Short-Circuit Ratio and Phase-Locked-Loop Parameters on the Small-Signal Behavior of a VSC-HVDC Converter

被引:566
作者
Zhou, Jenny Z. [1 ]
Ding, Hui [1 ]
Fan, Shengtao [1 ]
Zhang, Yi [2 ]
Gole, Aniruddha M. [1 ]
机构
[1] Univ Manitoba, Dept Elect & Comp Engn, Winnipeg, MB R3T 5V6, Canada
[2] RTDS Technol Inc, Winnipeg, MB R3T 2E1, Canada
基金
加拿大自然科学与工程研究理事会;
关键词
HVDC transmission; maximum power transfer; phase-locked loop (PLL); short-circuit ratio (SCR); small-signal analysis; voltage-source converter (VSC); STABILITY;
D O I
10.1109/TPWRD.2014.2330518
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The impact of phase-locked loop (PLL) parameters on the dynamic and steady-state behavior of a voltage-source converter (VSC) in an HVDC transmission system is determined as a function of the system strength [parameterized by the short-circuit ratio (SCR)]. This is achieved by using a linearized small-signal model of the converter system and its controls. The model is validated via electromagnetic transients simulation of the fully detailed large signal model. An interesting result from this study is that the maximum power transfer capability of the VSC-HVDC converter is affected by the PLL gains, and that the theoretical limit (obtained from static voltage stability analysis) is approachable as the PLL gains become very small. This paper shows that gains of the PLL, particularly at low SCRs, greatly affect the operation of the VSC-HVDC converter and that operation at low SCRs approaching 1.3 is very difficult.
引用
收藏
页码:2287 / 2296
页数:10
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