Lithography strategy for 65nm node

被引:12
作者
Borodovsky, Y [1 ]
Schenker, R [1 ]
Allen, G [1 ]
Tejnil, E [1 ]
Hwang, D [1 ]
Lo, FC [1 ]
Singh, V [1 ]
Gleason, R [1 ]
Brandenburg, J [1 ]
Bigwood, R [1 ]
机构
[1] Intel Corp, Log Technol Dev, Technol & Mfg Grp, Hillsboro, OR 97124 USA
来源
PHOTOMASK AND NEXT-GENERATION LITHOGRAPHY MASK TECHNOLOGY IX | 2002年 / 4754卷
关键词
D O I
10.1117/12.476916
中图分类号
O43 [光学];
学科分类号
070207 ; 0803 ;
摘要
The lithography strategy for 65 nm technology high volume manufacturing was discussed. The severe challanges to all areas of mask making infrastructure and process development because of the stringent requirements for strong phase shifted masks coupled with advanced optical proximity correction (OPC) were also presented. It was shown that the patterning solutions for 160 nm pitch with the use of 157 nm lithography will be similar to those used in 248 nm-based manufacturing for 130 nm node.
引用
收藏
页码:1 / 14
页数:14
相关论文
共 5 条
[1]  
BALHORN G, P SPIE, V4562, P183
[2]  
LEVENSON MD, SPIE, V4186, P395
[3]  
MATSUKURA I, 2001, 157 NM TECHN DAT REV
[4]  
RIEGER ML, P SPIE, V4562, P154
[5]  
SCHENKER R, 2002, US PATENT APPL