Integrated enhancement- and depletion-mode FET's in modulation-doped Si/SiGe heterostructures

被引：12

作者：

Ismail, K

Chu, JO

Arafa, M

机构：

[1] IBM T. J. Watson Research Center, Yorktown Heights

[2] Department of Electrical Engineering, University of Illinois, Urbana-Champaign

来源：

IEEE ELECTRON DEVICE LETTERS | 1997年 / 18卷 / 09期

关键词：

D O I：

10.1109/55.622521

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this letter, we present results of enhancement and depletion mode transistors fabricated on the same layer structure of Si/SiGe, without using gate recess. The current in the enhancement mode device is controlled by a pn-junction, while that of the depletion-mode device is controlled by a Schottky barrier. A peak transconductance of 327 mS/mm and 417 mS/mm has been achieved in 0.5-mu m gate length depletion and enhancement-mode transistors, respectively.

引用

页码：435 / 437

页数：3

共 5 条

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[3]

KOENIG U, 1995, SOLID STATE ELECT, V38, P1595

[4] Design of Si/SiGe heterojunction complementary metal-oxide-semiconductor transistors [J].

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Ismail, K ;

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IEEE TRANSACTIONS ON ELECTRON DEVICES, 1996, 43 (08) :1224-1232

[5]

Welser J., 1992, International Electron Devices Meeting 1992. Technical Digest (Cat. No.92CH3211-0), P1000, DOI 10.1109/IEDM.1992.307527

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