The separation of generation lifetimes of Si and SiGe using capacitance-transient measurements on MOS capacitors formed by plasma anodisation of Si:Si0.9Ge0.1:Si substrates

被引：10

作者：

Riley, LS

Hall, S

Bonar, JM

机构：

[1] Univ Liverpool, Dept Elect & Elect Engn, Liverpool L69 3GJ, Merseyside, England

[2] Univ Southampton, Dept Elect & Comp Sci, Southampton SO17 1BJ, Hants, England

来源：

SOLID-STATE ELECTRONICS | 1999年 / 43卷 / 12期

基金：

英国工程与自然科学研究理事会;

关键词：

chemical vapour deposition; plasma anodisation; silicon; silicon germanium; generation lifetime;

D O I：

10.1016/S0038-1101(99)00212-9

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A simple technique leading to the measurement of minority carrier lifetimes of UHV compatible LPCVD Si and SiGe by C-t depth profiling of Metal:Oxide:Si:SiGe:Si structures is reported. A high quality gate oxide is realised by low temperature (< 100 degrees C) plasma anodisation thereby reducing any oxidation effects on the underlying epitaxial layer quality, Capacitance response times were observed for an impurity concentration of similar to 2.5 x 10(17) cm(-3), giving rise to generation lifetimes of the Si and Si0.9Ge0.1 of >0.55 and 2.6 mu s respectively, reflective of very high quality epitaxial semiconductor material. (C) 1999 Elsevier Science Ltd. All rights reserved.

引用

页码：2247 / 2250

页数：4

共 9 条

[1]

*ATL US MAN, 1997, DEV SIM SOFTW SILVAC

[2] SURFACE STATES AT STEAM-GROWN SILICON-SILICON DIOXIDE INTERFACES [J].