A magnitude/phase-locked loop system based on estimation of frequency and in-phase/quadrature-phase amplitudes

被引:164
作者
Karimi-Ghartemani, M [1 ]
Karimi, H [1 ]
Iravani, MR [1 ]
机构
[1] Univ Toronto, Dept Elect & Comp Engn, CAPE, Toronto, ON M5S 3G4, Canada
关键词
frequency estimation; peak detectors; phase detection; phase-locked loops (PLLs); power system state estimation; quadrature amplitude modulation; synchronization;
D O I
10.1109/TIE.2004.825282
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 [计算机科学与技术];
摘要
This paper introduces a new phase-locked loop (PLL) system. The proposed system provides the dominant frequency component of the input signal and estimates its frequency. The mechanism of the proposed PLL is based on estimating in-phase and quadrature-phase amplitudes of the desired signal and, hence, has application advantages for communication systems which employ quadrature modulation techniques. The studies demonstrate that the proposed PLL also provides a superior performance for power system applications. Derivation of the mathematical model and theoretical stability analysis of the proposed PLL are carried out using dynamical systems theory. Advantages of the proposed PLL over the conventional PLLs are its capability of providing the fundamental component of the input signal which is not only locked in phase but also in amplitude to the actual signal while providing an estimate of its frequency. Computer simulation is used to evaluate its performance. Evaluations confirm structural robustness or the proposed PLL with respect to noise and distortions.
引用
收藏
页码:511 / 517
页数:7
相关论文
共 13 条
[1]
COSTAS JP, 1956, P IRE DEC, P1713
[2]
Gardner F. M., 1979, PHASELOCK TECHNIQUES
[3]
Hale JK., 1969, ORDINARY DIFFERENTIA
[4]
HAMBLY AR, 1990, INTRO COMMUNICATION
[5]
Phase-locked loop techniques - A survey [J].
Hsieh, GC ;
Hung, JC .
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, 1996, 43 (06) :609-615
[6]
Periodic orbit analysis of two dynamical systems for electrical engineering applications [J].
Karimi-Ghartemani, M ;
Ziarani, AK .
JOURNAL OF ENGINEERING MATHEMATICS, 2003, 45 (02) :135-154
[7]
Special section on phase-locked loop techniques [J].
Lai, MF ;
Nakano, M .
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, 1996, 43 (06) :607-608
[8]
Lindsey W. C., 1973, Telecommunication Systems Engineering
[9]
A SURVEY OF DIGITAL PHASE-LOCKED LOOPS [J].
LINDSEY, WC ;
CHIE, CM .
PROCEEDINGS OF THE IEEE, 1981, 69 (04) :410-431
[10]
MIRABBASI S, 2000, P ISCAS 2000, V4, P661