Low-voltage electric-double-layer paper transistors gated by microporous SiO2 processed at room temperature

被引:50
作者
Sun, Jia [1 ]
Wan, Qing [1 ]
Lu, Aixia [1 ]
Jiang, Jie [1 ]
机构
[1] Hunan Univ, State Key Lab Chemobiosensing & Chemometr, Minist Educ, Key Lab Micro Nano Optoelect Devices, Changsha 410082, Hunan, Peoples R China
基金
中国国家自然科学基金;
关键词
field effect transistors; semiconductor materials; semiconductor thin films; thin film transistors; tin compounds; THIN-FILM TRANSISTORS; FIELD-EFFECT TRANSISTORS; DIELECTRICS; CAPACITANCE; DISPLAYS; MOBILITY; TFT;
D O I
10.1063/1.3270001
中图分类号
O59 [应用物理学];
学科分类号
摘要
Battery drivable low-voltage SnO2-based paper thin-film transistors with a near-zero threshold voltage (V-th=0.06 V) gated by microporous SiO2 dielectric with electric-double-layer (EDL) effect are fabricated at room temperature. The operating voltage is found to be as low as 1.5 V due to the huge gate specific capacitance (1.34 mu F/cm(2) at 40 Hz) related to EDL formation. The subthreshold gate voltage swing and current on/off ratio is found to be 82 mV/decade and 2.0x10(5), respectively. The electron field-effect mobility is estimated to be 47.3 cm(2)/V s based on the measured gate specific capacitance at 40 Hz.
引用
收藏
页数:3
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