Hardware synthesis of explicit model predictive controllers

被引:67
作者
Johansen, Tor A. [1 ]
Jackson, Warren
Schreiber, Robert
Tondel, Petter
机构
[1] Norwegian Univ Sci & Technol, Dept Engn Cybernet, NO-7491 Trondheim, Norway
[2] Hewlett Packard Labs, Palo Alto, CA 94304 USA
关键词
digital hardware; hardware synthesis; model predictive control (MPC); optimization; piecewise-linear (PWL) functions;
D O I
10.1109/TCST.2006.883206
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
The general solution to constrained linear and piecewise linear model predictive control (MPC) has recently been explicitly characterized in terms of piecewise-linear (PWL) state feedback control. This means that a PWL controller can be precomputed using parametric programming, and the exact explicit MPC implementation amounts to the evaluation of a PWL function in the control unit. It has recently been shown that PWL function evaluation can be accelerated by searching a binary tree data structure, leading to highly efficient, accurate, and verifiable software implementation in low-cost embedded control units. In this work, we report hardware synthesis results for this type of PWL control, and show that explicit MPC solutions can be implemented in an application specific integrated circuit (ASIC) with about 20 000 gates, leading to computation times in the microsecond scale. This opens the way for the use of highly advanced control designs such as constrained MPC in small-scale industrial and consumer electronics application areas that are characterized by fast sampling or low cost, including mechatronics, microelectromechanical systems (MEMS), automotive control, power electronics, and acoustics. The main limitation of the approach is that the memory requirements increase rapidly with the problem dimensions.
引用
收藏
页码:191 / 197
页数:7
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