Integration of Cu/SiOC in Cu dual damascene interconnect for 0.1-μm technology

被引：25

作者：

Fayolle, M

Torres, J

Passemard, G

Fusalba, F

Fanget, G

Louis, D

Assous, M

Louveau, O

Rivoire, M

Haxaire, K

Mourier, M

Maitrejean, S

Besson, P

Broussous, L

Arnaud, L

Feldis, H

机构：

[1] CEA, LETI, F-38054 Grenoble 9, France

[2] STMicroelect, F-38926 Crolles, France

[3] STMicroelect, F-38054 Grenoble 9, France

来源：

MICROELECTRONIC ENGINEERING | 2002年 / 64卷 / 1-4期

关键词：

interconnection; copper; low-k dielectric; integration; organo-silicate glass; SiOC;

D O I：

10.1016/S0167-9317(02)00769-4

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper presents the integration of copper with SiOC low-k dielectric (k = 2.9). As SiO2 or FSG, this organo-silicate glass (OSG) is deposited by PECVD techniques. This work is focused on process adaptations required to integrate this carbon-doped material (carbon content = 20 wt%). It is shown that due to its carbon content, oxygen-based treatments and stripping must be carefully optimised. Due to its micro-porosity, this material is very sensitive to the resist poisoning phenomenon. This issue can be minimized (suppressed) by material composition, processes and architecture improvements. After optimisations this material was successfully integrated in two metal level interconnects with excellent electrical and reliability results. (C) 2002 Elsevier Science B.V. All rights reserved.

引用

页码：35 / 42

页数：8