Performance limits for processor networks with divisible jobs

被引：8

作者：

Bataineh, S ^{[1
]}

Robertazzi, TG ^{[1
]}

机构：

[1] SUNY STONY BROOK,DEPT ELECT ENGN,STONY BROOK,NY 11794

来源：

IEEE TRANSACTIONS ON AEROSPACE AND ELECTRONIC SYSTEMS | 1997年 / 33卷 / 04期

关键词：

D O I：

10.1109/7.625112

中图分类号：

V [航空、航天];

学科分类号：

08 ; 0825 ;

摘要：

Ultimate performance limits to the aggregate processing speed of networks of processors that are processing a divisible job are described. These take the form of either closed-form expressions or numerical procedures to calculate the equivalent processing speed of an infinite number of processors. These processors are interconnected in either a linear daisy chain with load origination from the network interior or a tree topology. The tree topology is particularly general as a natural way to perform load distribution in a processor network topology with cycles (e.g., hypercube, toroidal network) is to use an embedded spanning tree. Such limits on performance are important as they provide an ideal baseline against which to compare the performance of finite configurations of processors.

引用

页码：1189 / 1198

页数：10

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