Dithering skip modulator with a width controller for ultra-wride-load high-efficiency DC-DC converters

被引:7
作者
Huang, Hong-Wei [1 ]
Ho, Hsin-Hsin [2 ]
Chien, Chieh-Ching [2 ]
Chen, Ke-Horng [2 ]
Ma, Gin-Kou [3 ]
Kuo, Sy-Yen [1 ]
机构
[1] Natl Taiwan Univ, Grad Inst Elect Engn, Taipei 10764, Taiwan
[2] Natl Chiao Tung Univ, Deprtment Elect & Ctrl Engn, Hsinchu, Taiwan
[3] Ind Technol Res Inst, Hsinchu, Taiwan
来源
PROCEEDINGS OF THE IEEE 2006 CUSTOM INTEGRATED CIRCUITS CONFERENCE | 2006年
关键词
D O I
10.1109/CICC.2006.320863
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper proposes a temperature-independent load sensor to decide the optimum power MOSFET width for power saving of DC-DC converters. Besides, it also can decide the optimum modulation technique in tri-mode operation, which is composed of pulse-width modulation (PWM), pulse-frequency modulation (PFM), and a new proposed dithering sldp modulation (DSM). An efficiency-improving DSM operation is introduced to raise the efficiency drop because of transition from PWM to PFM. Importantly, DSM mode can dynamically sldp the number of gate driving pulses, which is inverse proportional to load current. Simplistically and qualitatively stated, the novel load sensor can automatically select the optimum modulation method and optimum power MOSFET width to achieve high efficiency over a wide load range. Experimental results show the tri-mode operation can have high efficiency about 89 % over a wide load current range from 3mA to 500mA. Owing to the effective mitigation of the switching loss contributed by large power MOSFET, the novel width controller not only achieves high efficiency about 95 % but also extends this high efficiency to a lower load current range about 0.1mA.
引用
收藏
页码:643 / 646
页数:4
相关论文
共 9 条
[1]  
Esteves J. M., 2004, U.S. Patent, Patent No. [6,724,174, 6724174]
[2]  
Forghani-zadeh HP, 2002, 2002 45TH MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL II, CONFERENCE PROCEEDINGS, P577
[3]   A monolithic current-mode CMOS DC-DC converter with on-chip current-sensing technique [J].
Lee, CF ;
Mok, PKT .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2004, 39 (01) :3-14
[4]  
LEE HC, 2005, IWSOC JUL, P352
[5]  
LUO P, 2004, POW EL C OCT, P87
[6]  
PETERCHEV AV, 2005, THESIS U CALIFORNIA
[7]   A high-efficiency, dual-mode, dynamic, buck-boost power supply IC for portable applications [J].
Sahu, B ;
Rincón-Mora, GA .
18TH INTERNATIONAL CONFERENCE ON VLSI DESIGN, PROCEEDINGS: POWER AWARE DESIGN OF VLSI SYSTEMS, 2005, :858-861
[8]  
Sandri P., 1998, U.S. Patent, Patent No. [5 745 352, 5745352]
[9]   A 4-μA quiescent-current dual-mode digitally controlled buck converter IC for cellular phone applications [J].
Xiao, JW ;
Peterchev, AV ;
Zhang, JH ;
Sanders, SR .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2004, 39 (12) :2342-2348