A selective-epitaxial SiGe HBT with SMI electrodes featuring 9.3-ps ECL-gate delay

被引：28

作者：

Washio, K ^{[1
]}

Ohue, E ^{[1
]}

Oda, K ^{[1
]}

Tanabe, M ^{[1
]}

Shimamoto, H ^{[1
]}

Onai, T ^{[1
]}

机构：

[1] Hitachi Ltd, Cent Res Lab, Tokyo 185, Japan

来源：

INTERNATIONAL ELECTRON DEVICES MEETING - 1997, TECHNICAL DIGEST | 1997年

关键词：

D O I：

10.1109/IEDM.1997.650501

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A selective-epitaxial SiGe base heterojunction bipolar transistor (HBT) with self-aligned stacked metal/IDP (SMI) electrodes is proposed. The SiGe-base structure, self-aligned to the 0.1-mu m-wide emitter, effectively reduces collector capacitance and SMI electrodes provide low parasitic resistances. A BPSG/SiO2-refilled trench was introduced to reduce the substrate capacitance. A 9.3-ps delay time in a differential ECL ring oscillator was achieved.

引用

页码：795 / 798

页数：4