New architecture for MHz switching frequency PFC

被引：20

作者：

Wang, Chuanyun ^{[1
]}

Xu, Ming ^{[1
]}

Lu, Bing ^{[1
]}

Lee, Fred C. ^{[1
]}

机构：

[1] Virginia Polytech Inst & State Univ, Ctr Power Elect Syst, Blacksburg, VA 24061 USA

来源：

APEC 2007: TWENTY-SECOND ANNUAL IEEE APPLIED POWER ELECTRONICS CONFERENCE AND EXPOSITION, VOLS 1 AND 2 | 2007年

基金：

美国国家科学基金会;

关键词：

D O I：

10.1109/APEX.2007.357512

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

In this paper, the concept of high frequency operation to sbrm*k the EMI filter and inductor size in the PFC circuit is demonstrated; A 600 kHz single switch CCM boost PFC with 92% full load efficiency at 90 VAC input is developed with the Mneon newly developed CoolMOS and SiC diode devices. Both the EMI filter and the inductor size are greatly reduced. Further more, a new two-stage PFC architecture is introduced. This enables the PFC to run at 1 MHz with 92.8% full load efficiency. At such high operating frequency, the EMI filter and inductor size is further reduced. For the second stage in this structure, a high efficiency, and high power density voltage doubler is proposed. The measured full load efficiency of the voltage doubler prototype is 99%. Interleaving multi-phase high frequency PFC architecture is also introduced. The ability to reduce the EMI filter size by increase the EMI noise frequency is discussed and demonstrated.

引用

页码：179 / +

页数：2

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