State-of-the-art in heterogeneous computing

被引:160
作者
Brodtkorb, Andre R. [1 ]
Dyken, Christopher [1 ]
Hagen, Trond R. [1 ]
Hjelmervik, Jon M. [1 ]
Storaasli, Olaf O. [2 ]
机构
[1] SINTEF ICT, Dept Appl Math, N-0314 Oslo, Norway
[2] Oak Ridge Natl Lab, Future Technol Grp, Oak Ridge, TN USA
关键词
Power-efficient architectures; parallel computer architecture; stream or vector architectures; energy and power consumption; microprocessor performance; BROAD-BAND ENGINE; PERFORMANCE; ALGEBRA; SIMULATION; ACCURACY;
D O I
10.3233/SPR-2009-0296
中图分类号
TP31 [计算机软件];
学科分类号
081202 ; 0835 ;
摘要
Node level heterogeneous architectures have become attractive during the last decade for several reasons: compared to traditional symmetric CPUs, they offer high peak performance and are energy and/or cost efficient. With the increase of fine-grained parallelism in high-performance computing, as well as the introduction of parallelism in workstations, there is an acute need for a good overview and understanding of these architectures. We give an overview of the state-of-the-art in heterogeneous computing, focusing on three commonly found architectures: the Cell Broadband Engine Architecture, graphics processing units (GPUs), and field programmable gate arrays (FPGAs). We present a review of hardware, available software tools, and an overview of state-of-the-art techniques and algorithms. Furthermore, we present a qualitative and quantitative comparison of the architectures, and give our view on the future of heterogeneous computing.
引用
收藏
页码:1 / 33
页数:33
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