[1] Fujitsu Labs Ltd, Atsugi, Kanagawa 24301, Japan
来源:
INTERNATIONAL ELECTRON DEVICES MEETING - 1997, TECHNICAL DIGEST
|
1997年
关键词:
D O I:
10.1109/IEDM.1997.650291
中图分类号:
TM [电工技术];
TN [电子技术、通信技术];
学科分类号:
0808 ;
0809 ;
摘要:
We report on a simple technique for fabricating a Sn nanocrystal array in thin SiO2 film. This technique uses low energy ion implantation followed by thermal annealing. Isolated Sn nanocrystals 5 nm in diameter are formed in an array with excellent size and position uniformity. Barrier height between a Sn nanocrystal and the substrate was obtained by measuring the temperature and frequency dependence of the capacitance of the diode structure. Single electron charging effect of the Sn nanocrystals were observed from current-voltage characteristics.