Voltage scheduling in the IpARM microprocessor system

被引:70
作者
Pering, T [1 ]
Burd, T [1 ]
Brodersen, R [1 ]
机构
[1] Univ Calif Berkeley, Berkeley Wireless Res Ctr, Berkeley, CA 94704 USA
来源
ISLPED '00: PROCEEDINGS OF THE 2000 INTERNATIONAL SYMPOSIUM ON LOW POWER ELECTRONICS AND DESIGN | 2000年
关键词
low-power; energy-efficient; RTOS; operating systems;
D O I
10.1109/LPE.2000.876764
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Microprocessors represent a significant portion of the energy consumed in portable electronic devices. Dynamic Voltage Scaling (DVS) allows a device to reduce energy consumption by lowering its processor speed at run-time, allowing a corresponding reduction in processor voltage and energy. A voltage scheduler determines the appropriate operating voltage by analyzing application constraints and requirements. A complete software implementation, including both applications and the underlying operating system, shows that DVS is effective at reducing the energy consumed without requiring extensive software modification.
引用
收藏
页码:96 / 101
页数:6
相关论文
共 16 条
[1]  
*ADV RISC MACH LTD, 1996, ARM 8 DAT SHEET
[2]  
[Anonymous], P 28 HAW INT C SYST
[3]  
BURD T, 2000, 2000 IEE INT SOL STA
[4]  
BURNS A, 1997, REAL TIME SYSTEMS PR
[5]   LOW-POWER CMOS DIGITAL DESIGN [J].
CHANDRAKASAN, AP ;
SHENG, S ;
BRODERSEN, RW .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1992, 27 (04) :473-484
[6]  
ENDO Y, 1996, P 2 S OP SYST DES IM
[7]  
GOVIL K, 1995, P 1 INT C MOB COMP N
[8]  
HONG I, 1998, IEEE ACM INT C COMP
[9]  
HONG I, 1998, DES AUT C
[10]  
ISHIHARA T, P 1998 INT S LOW POW