Experimental study of carrier velocity overshoot in sub-0.1 mu m devices - Physical limitation of MOS structures

We have experimentally studied the carrier velocity overshoot in sub-0.1 mu m region for both SOI and bulk MOSFETs and the physical mechanism for the velocity degradation. At low transverse field and low carrier density conditions in SOI, it is possible to realize the carrier velocity overshoot in the sub-0.1 mu m region. However, it is very difficult in MOS structures to improve the carrier velocity at a high carrier density condition, because of both the phonon/surface roughness scattering and an anomalous scattering. This is the physical limitation of scaled MOS structures to realize higher current drivability.