Copper contamination induced degradation of MOSFET characteristics and reliability

被引：14

作者：

Inohara, M ^{[1
]}

Sakurai, H ^{[1
]}

Yamaguchi, T ^{[1
]}

Tomita, H ^{[1
]}

Iijima, T ^{[1
]}

Oyamatsu, H ^{[1
]}

Nakayama, T ^{[1
]}

Yoshimura, H ^{[1
]}

Toyoshima, Y ^{[1
]}

机构：

[1] Toshiba Corp, Microelect Engn Lab, Isogo Ku, Yokohama, Kanagawa 2358522, Japan

来源：

2000 SYMPOSIUM ON VLSI TECHNOLOGY, DIGEST OF TECHNICAL PAPERS | 2000年

关键词：

D O I：

10.1109/VLSIT.2000.852755

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

MOSFET electrical characteristics and reliability impact with copper contamination is examined and some degradation modes are inspected. The mechanism of degradation are explained by increase of carrier trap sites in gate silicon oxide. The permissive contamination level of copper in device region is indicated by comparison between two different contamination level samples.

引用

页码：26 / 27

页数：2