Universal strong encryption FPGA core implementation

被引:5
作者
Runje, D [1 ]
Kovac, M [1 ]
机构
[1] Univ Zagreb, Fac Elect & Comp Engn, Zagreb 10000, Croatia
来源
DESIGN, AUTOMATION AND TEST IN EUROPE, PROCEEDINGS | 1998年
关键词
D O I
10.1109/DATE.1998.655971
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
IDEA is a symmetric block cipher with a 128-bit key proposed to replace DES where a strong encryption is required. Many applications need speed of a hardware encryption implementation white trying to preserve flexibility and low cost of a software implementation. In this paper we have presented one solution of this problem. Our system architecture uses single core module named Round to implement IDEA algorithm. Using the core we were able to implement and test example application in only three days. This "of the shelf" solution for designing cryptographic application using IDEA algorithm significantly reduced design cycle, thus greatly reducing time-to-marker and cost of such designs. By increasing the number of the round modules system designer can linearly increase speed of the design. This system design methodology makes it possible to achieve necessary performance, or to preserve area (and reduce costs) when needed unlike other known approaches. We have implemented one round UNICORN architecture in Xilinx FPGA. After implementation the chip has been tested using the standard test vectors and it was capable of performing 2.8 Mbps encryption in both ECB and CBC mode.
引用
收藏
页码:923 / 924
页数:2
相关论文
empty
未找到相关数据