Thermo-mechanical fatigue reliability of Pb-free ceramic ball grid arrays: Experimental data and lifetime prediction modeling

被引:8
作者
Farooq, M [1 ]
Goldmann, L [1 ]
Martin, G [1 ]
Goldsmith, C [1 ]
Bergeron, C [1 ]
机构
[1] IBM Microelect, Inter Connect Packaging Dev, Hopewell Jct, NY 12533 USA
来源
53RD ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE, 2003 PROCEEDINGS | 2003年
关键词
D O I
10.1109/ECTC.2003.1216385
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
Driven by industry-wide demands and, impending legislation both in the US and overseas, there has been a development effort to optimize the performance of Pb-free alloys in Ceramic Ball Grid Array, (CBGA) assemblies. Further, driven by shrinking I/O pitch to accommodate increasing wiring density, there has been a need to develop Pb-free solders for fine pitch CBGA applications. During the optimization of Thermo-Mechanical Fatigue (TMF) Reliability of CBGA assemblies using SnAgCu (SAC) alloys, it was found that SAC CBGA assemblies could perform better under typical conditions of Accelerated Thermal Cycling. (ATC) compared to IBM's standard dual alloy Sn/Pb CBGA packages. For Pb-containing CBGAs, the TMF reliability can restrict package dimensions to 32mm body size for many applications. Larger packages have greater Distance to Neutral Point (DNP) values, often leading to inadequate TMF reliability. This necessitates the use of alternate technologies, such as Land Grid Array (LGA) or Column Grid Array (CGA),,which may impact electrical inductance. However, experimental data using SAC CBGAs, now suggest that larger DNPs, and hence larger package sizes, are possible with this system. In order to better understand the behavior of SAC CBGA, under conditions of stress induced by thermal mismatch strains, experimental electrically testable hardware has been built with various values of chip carrier body size and thickness, board thickness and I/O pitch. TMF data on these parts will be reported as well as physical analysis of the cycled interconnections, and a finite element model, which permits extrapolation to other product configurations.
引用
收藏
页码:827 / 833
页数:7
相关论文
共 13 条
[1]  
BATH J, 2000, CIRCUITS ASSEMBLY, V11, P31
[2]  
FAROOQ M, 2001, P 51 EL COMP TECHN C
[3]  
FAROOQ M, 2003, IN PRESS P ANN TMS C
[4]  
FAROOQ S, 2001, Patent No. 6235996
[5]  
HART P, 2000, P SEM PACK S SEMICON
[6]  
HENDERSON DW, 2002, J MAT RES NOV
[7]  
HUANG B, 1999, LEAD FREE SOLD S SUN
[8]  
KANG SK, 1999, P 49 EL COMP TECH C
[9]  
KIM KS, IN PRESS SCI ENG A
[10]  
LEVIS K, 2000, P 50 EL COMP TECH C