Three-level inverter configuration cascading two two-level inverters

被引:82
作者
Somasekhar, VT [1 ]
Gopakumar, K [1 ]
机构
[1] Indian Inst Sci, Ctr Elect Design & Technol, Bangalore 560012, Karnataka, India
来源
IEE PROCEEDINGS-ELECTRIC POWER APPLICATIONS | 2003年 / 150卷 / 03期
关键词
D O I
10.1049/ip-epa:20030259
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A power circuit configuration to realise three-level inversion is proposed. Three-level inversion is realised by connecting two two-level inverters in cascade, in the proposed configuration. An isolated DC power supply is used to supply each inverter in this power circuit. Each DC-link voltage is equal to half of the DC-link voltage in a conventional NPC (neutral point clamped) three-level inverter topology. Neutral point fluctuations are absent, and fast recovery neutral clamping diodes are not needed. The proposed inverter scheme produces 64 space-vector combinations distributed over 19 space-vector locations as compared to 27 combinations in a conventional three-level topology. The present power circuit can be operated as a two-level inverter in the range of lower modulation, by clamping one inverter to a zero state and by switching the other inverter. When compared to the H-bridge topology, this circuit needs one power supply less. A space vector based PWM scheme is used for the experimental verification of, the proposed topology.
引用
收藏
页码:245 / 254
页数:10
相关论文
共 9 条
[1]  
KIM JS, 1995, IPEC 95 YOK JAP, P742
[2]   A novel PWM scheme for a three-level voltage source inverter with GTO thyristors [J].
Lee, YH ;
Suh, BS ;
Hyun, DS .
IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, 1996, 32 (02) :260-268
[3]  
Manjrekar MD, 1998, APPL POWER ELECT CO, P523, DOI 10.1109/APEC.1998.653825
[4]   A NEW NEUTRAL-POINT-CLAMPED PWM INVERTER [J].
NABAE, A ;
TAKAHASHI, I ;
AKAGI, H .
IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, 1981, 17 (05) :518-523
[5]  
RUFER A, 1999, P 8 EUR C POW EL APP, pP1
[6]  
SHIVAKUMAR EG, 2001, P 16 ANN APPL EL C A, P394
[7]  
STEMMLER H, 1993, IEE CONF PUBL, P7
[8]   A new N-level high voltage inversion system [J].
Suh, BS ;
Hyun, DS .
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, 1997, 44 (01) :107-115
[9]  
von Jouanne A, 2001, IEEE POWER ELECTRON, P1341, DOI 10.1109/PESC.2001.954306