The long and winding road to high-performance image processing with MMX/SSE

被引：22

作者：

Conte, G ^{[1
]}

Tommesani, S ^{[1
]}

Zanichelli, F ^{[1
]}

机构：

[1] Univ Parma, Dipartimento Ingn Informaz, I-43100 Parma, Italy

来源：

5TH INTERNATIONAL WORKSHOP ON COMPUTER ARCHITECTURES FOR MACHINE PERCEPTION, PROCEEDINGS | 2000年

关键词：

D O I：

10.1109/CAMP.2000.875989

中图分类号：

TP18 [人工智能理论];

学科分类号：

081104 ; 0812 ; 0835 ; 1405 ;

摘要：

Recently introduced "SIMD on registers" extensions to commodity microprocessors instruction sets promise (according to the makers) high potential speed-lips for multimedia processing tasks. This paper introduces the complex programming model of MMX/SSE extensions and discusses how the achievement of an effective performance increase over sequential code is no easy task also due to a poor software support. Experiences gained on two realtime image processing projects helped defining a programming methodology and evaluating the tradeoffs to obtain substantial speed-ups with MMX/SSE code.

引用

页码：302 / 310

页数：9

共 12 条

[1]

[Anonymous], 1999, AUTOMATIC VEHICLE GU

[2]

BHARGAVA R, 1998, P 31 ANN ACM IEEE IN

[3]

CONTE TM, 1997, IEEE COMPUTER DEC

[4]

DIEFENDORFF K, 1997, IEEE MICRO SEP

[5]

DRAPER DA, 1997, 43 ISSCC IEEE INT SO, P172

[6]

LEE RB, 1997, IEEE WORKSH SIGN PRO, P9

[7]

*MMX, 528 MMX

[8]

Ottaviani E, 1999, IEE CONF PUBL, P652, DOI 10.1049/cp:19990404

[9] MMX technology extension to the Intel architecture [J].

Peleg, A ;

Weiser, U .

IEEE MICRO, 1996, 16 (04) :42-50

[10]

Ranganathan P, 1999, CONF PROC INT SYMP C, P124, DOI [10.1109/ISCA.1999.765945, 10.1145/307338.300990]

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