Microstenciling: A generic technology for microscale patterning of vapor deposited materials

被引：31

作者：

Graff, M ^{[1
]}

Mohanty, SK ^{[1
]}

Moss, E ^{[1
]}

Frazier, AB ^{[1
]}

机构：

[1] Georgia Inst Technol, Sch Elect & Comp Engn, Atlanta, GA 30332 USA

来源：

JOURNAL OF MICROELECTROMECHANICAL SYSTEMS | 2004年 / 13卷 / 06期

关键词：

metallization; microstenciling; microsystems; thin-film deposition;

D O I：

10.1109/JMEMS.2004.838368

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this work, the fabrication of microstencils for patterning on unconventional substrates was demonstrated. Stencil feature sizes ranging from 6 to 370 mum with aspect ratios (stencil feature height : width) in the range of 0.5: 1 to 15: 1 were fabricated using ICP etching of silicon. The stenciling process was demonstrated for the deposition of metals (Ti/Au) and dielectrics (silicon dioxide) onto silicon, glass, and polymer based substrates for microfluidic system development. The results demonstrated some dependency of the deposition rate on the stencil feature size and aspect ratio. Results from adhesion studies showed excellent adhesion on all substrates with the exception of PMMA.

引用

页码：956 / 962

页数：7

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