Electro-thermal simulation for the prediction of chip operation within the package

被引：15

作者：

Rencz, M

Székely, V

Poppe, A

Torki, K

Courtois, B

机构：

来源：

NINETEENTH ANNUAL IEEE SEMICONDUCTOR THERMAL MEASUREMENT AND MANAGEMENT SYMPOSIUM | 2003年

关键词：

electro-thermal; simulation; logi-thermal simulation; thermal simulation; thermal modeling;

D O I：

10.1109/STHERM.2003.1194357

中图分类号：

O414.1 [热力学];

学科分类号：

摘要：

The device level electro-thermal simulation of analog circuits and the logical gate level logi-thermal simulation of digital circuits are addressed in the paper. After presenting the main algorithms realization questions are also discussed. For both the electro-thermal cases simulated results of realized structures are presented. These are compared with benchmark results, proving the applicability and the accuracy of the methods.

引用

页码：168 / 175

页数：8

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