Optimized sub-micron organic thin-film transistors: the influence of contacts and oxide thickness

For future low cost electronics, high-performance organic thin-film transistors (OTFT) are highly desirable. One possible route towards device optimization is the downscaling of the channel length L into the sub-micrometer regime which allows higher operation frequency, better integration and enhanced currents. Reducing the channel length decreases the effect of grain boundaries on transport in polycrystalline organic films, but in return the metal-organic contact resistance becomes more important. Furthermore, sub-micrometer devices require a thinner insulator layer to maintain a proper scaling of the ratio between the longitudinal and transversal electrical field in the channel. We present a systematic study of transistors based on vacuum-deposited dihexylquaterthiophene (DH4T), an n-type Si gate, a SiO2 insulator layer and metal drain/source contacts with channel lengths L from 50 mum down to 50 nm. When varying the contact metal (Ti/Au, Ti/Pt and Pd), we observe a disadvantageous influence of the Ti adhesion layer, which can be partially eliminated by reducing the Ti layer thickness. For channel lengths in the sub-micrometer range a strong beneficial effect occurs when reducing the SiO2 thickness from 100 to 30 urn. Our devices with 30 nm oxide layers show standard FET characteristics (i.e., no short-channel effects), a high carrier mobility of about 4 x 10(-2) cm(2)/V s and an on/off current ratio of 10(5) and beyond for channel lengths down to 180 nm. The field-effect is still well observable even for channel lengths down to 50 nm. (C) 2004 Elsevier B.V. All rights reserved.