Voltage-balance limits in four-level diode-clamped converters with passive front ends

被引:217
作者
Pou, J [1 ]
Pindado, R
Boroyevich, D
机构
[1] Tech Univ Catalonia, Power Qual & Renewable Energy QuPER, Dept Elect Engn, Terrassa 08222, Spain
[2] Virginia Polytech Inst & State Univ, CPES, Dept Elect & Comp Engn, Blacksburg, VA 24061 USA
基金
美国国家科学基金会;
关键词
Four-level inverter; multilevel inverter; nearest vectors; passive front ends; space-vector modulation (SVM); voltage balance;
D O I
10.1109/TIE.2004.837915
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
Multilevel diode-clamped converters with more than three levels cannot maintain voltage balance in the dc-link capacitors for some operating conditions due to the existence of de currents in the middle points. Since capacitors are either completely charged or discharged for those conditions, this circumstance severely limits practical application of these converters. The limit explored in this paper is that the four-level converter cannot achieve voltage balance. Proper redundant vectors are selected in the space-vector diagram so that a quadratic parameter related to the currents in the middle points is minimized.
引用
收藏
页码:190 / 196
页数:7
相关论文
共 11 条