Traditionally, the steady state thermal performance of packaged semiconductor devices has been characterized by only a single junction-to-ambient thermal resistance constant commonly referred to as theta(ja). This is particularly inadequate for multiple output devices where several power dissipating junctions reside within the same integrated circuit. This paper presents a study which discusses how linear superposition theory can be applied to better thermally characterize "small" multiple output devices (i.e. devices were the thermal contribution of the individual power outputs combine to form a singular cooling region at the surface of the package). Unlike previous superposition studies, the generation of a matrix multiplier is presented which corrects for the non-linear effects of both radiation and natural convection heat transfer. The end product is a linear matrix equation land non-linear matrix multiplier) which can be utilized by the customer to calculate individual output junction temperatures over a wide variation of power configurations, The Motorola MC1413P High Voltage, High Current Darlington Transistor Array,, which encompasses seven power junctions, is used as an example. The study steps through the generation of the linear matrix equation and evaluates the accuracy of the superposition model with and without the utilization of the non-linear matrix multiplier. A brief overview discussing the elements of device thermal characterization is provided for those readers who are unfamiliar with this field.