Monte Carlo simulation of capacitor shorts in trench-based DRAMs

被引:1
作者
Wittmann, J [1 ]
Kupfer, C [1 ]
机构
[1] Infineon Technol AG, D-81669 Munich, Germany
关键词
D O I
10.1149/1.1851036
中图分类号
O646 [电化学、电解、磁化学];
学科分类号
081704 ;
摘要
Polished vacancy rich material is used in high volume manufacturing of logic and memory devices. Inherent to the crystal pulling process of these materials are voids in the silicon crystal causing trench-based failure in dynamic random access memory (DRAM) chips. The number of failures per die was observed to grow with decreasing feature size. The purpose of the simulation model presented in this report is to quantify the number of these failures for future DRAM generations and thus to gain information about future material related requirements. (C) 2005 The Electrochemical Society.
引用
收藏
页码:G148 / G151
页数:4
相关论文
共 8 条
[1]   Defects in silicon crystals and their impact on DRAM device characteristics [J].
Dornberger, E ;
Temmler, D ;
von Ammon, W .
JOURNAL OF THE ELECTROCHEMICAL SOCIETY, 2002, 149 (04) :G226-G231
[2]  
GUTSCHE M, 2001, IEDM, P411, DOI DOI 10.1109/IEDM.2001.979524
[3]  
HAECKL W, IN PRESS
[4]  
HIRT G, 2003, P VDE VDI GMM WORKSH
[5]  
ITSUMI M, 1995, J APPL PHYS, V78, P10
[6]   Defect requirements for advanced 300mm DRAM substrates [J].
Kupfer, C ;
Roth, H ;
Dietrich, H .
MATERIALS SCIENCE IN SEMICONDUCTOR PROCESSING, 2002, 5 (4-5) :381-386
[7]  
NAKAMURA K, 1998, P SIL WAF S, P11
[8]  
Rupp T., 1999, International Electron Devices Meeting 1999. Technical Digest (Cat. No.99CH36318), P33, DOI 10.1109/IEDM.1999.823840