A 2.4 gb/s/pin simultaneous bidirectional parallel link with per-pin skew compensation

This paper describes voltage and timing margins and design trade-offs in low-cost parallel links. Results from a transceiver prototype demonstrate that per-pin skew compensation improves timing margins in these parallel links and can be implemented with reasonable cost overhead. Single-ended and simultaneous bidirectional links are viable alternatives to the traditional differential and unidirectional systems-these links require fewer pins and wires for the same bandwidth, and the additional noise sources, while significant, can be managed by careful circuit and package design.