Geometric linewidth and the impact of thermal processing on the stress regimes induced by electroless copper metallization for Si integrated circuit interconnect technology

Mechanical strains and stresses are a major concern in the development of copper-based on-chip metallization. Synchrotron x-ray topography (SXRT), micro-Raman spectroscopy, finite element modeling (FEM), and atomic force microscopy (AFM) have been used to examine the strain fields imposed by electroless Cu metallization on the underlying Si. As expected, we have observed enhanced strain regions close to the metal line edges. These strain fields tend to zero at annealing temperatures approaching 200degreesC, and thereafter the magnitudes of the strain fields at 300degreesC and 400degreesC are much higher, implying a return to a higher strain regime. Although the strain transition point is slightly different from the SXRT result, the FEM results confirm the existence of a zero-strain transition point as a function of thermal anneal. We have also examined the generated stress in Si as a function of Cu linewidth L. We have found that the stress sigma(XX) due to the electroless copper metallization is empirically related to the Cu linewidth in terms of an exponential distribution. For Cu linewidths less than 20 mum, the stress magnitudes increased with decreasing Cu linewidth due to the thermal stress in the absence of self-annealing, whereas the stress decreased with increasing linewidths in the range of 60-100 mum due to a relief of the thermal stress possibly via the self-annealing effect. This self-annealing phenomenon was observed using AFM. It is observed that the stresses in the Si shifted to a compressive state after annealing at 400degreesC. (C) 2004 American Institute of Physics.