A 0.25-μm 20-dBm 2.4-GHz CMOS power amplifier with an integrated diode linearizer

被引:60
作者
Yen, CC [1 ]
Chuang, HR [1 ]
机构
[1] Natl Cheng Kung Univ, Dept Elect Engn, Tainan 70101, Taiwan
关键词
2.4; GHz; 0.25; min; CMOS; diode linearizer; power amplifier (PA); WLAN;
D O I
10.1109/LMWC.2003.808722
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A 2.4-GHz CMOS power amplifier (PA) with an output power 20 dBm using 0.25-mum 1P5M standard CMOS process is presented. The PA uses an integrated diode connected NMOS transistor as the function of diode linearizer. It is believed that this is firstly reported to use the diode linearization technique in CMOS PA design. It shows effectively improvement in linearity from gain compression and ACPR measured results. Measurements are performed by using a FR-4 PCB test fixture. The fabricated power amplifier exhibits an output power of 20 dBm and a power-added efficiency as high as 28%. The obtained PA performances demonstrate the standard CMOS process potentialities for medium power RF amplification at 2.4 GHz wireless communication band.
引用
收藏
页码:45 / 47
页数:3
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