Dry etch improvements in the SOI Wafer Flow Process for IPL stencil mask fabrication

被引：28

作者：

Letzkus, F

Butschke, J

Höfflinger, B

Irmscher, M

Reuter, C

Springer, R

Ehrmann, A

Mathuni, J

机构：

[1] Inst Mikroelekt Stuttgart, D-70569 Stuttgart, Germany

[2] Infineon Technol AG, D-81617 Munich, Germany

来源：

MICROELECTRONIC ENGINEERING | 2000年 / 53卷 / 1-4期

关键词：

Dry etching - Fabrication - Masks - Silicon on insulator technology - Silicon wafers;

D O I：

10.1016/S0167-9317(00)00388-9

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The 4x Ion Projection Lithography (IPL), which is designed to reach sub 100nm resolution on the wafer plane, uses stencil membrane masks out of 150mm SOI (Silicon On Insulator) wafers [1]. The structured circular membranes have a diameter of 126mm and a thickness of 3 mu m. Results of a new sub-quarter micron trench etch and membrane dry etch process are presented and discussed.

引用

页码：609 / 612

页数：4