A 100 MHz FADC system based on CompactPCI for DCBA

被引：12

作者：

Kato, Y

Emura, T

Inagaki, T

Ishihara, N

Kitamura, S

Nagasaka, Y

Ohama, T

Omata, K

Sakamoto, Y

Tamura, N

Yamada, Y

机构：

[1] KEK, High Energy Accelerator Res Org, Inst Particle & Nucl Studies, Tsukuba, Ibaraki 3050801, Japan

[2] Tokyo Univ Agr & Technol, Koganei, Tokyo 1848588, Japan

[3] Niigata Univ, Grad Sch Sci & Technol, Niigata 9502181, Japan

[4] Grad Univ Adv Studies, Kanagawa 2400193, Japan

[5] Tokyo Metropolitan Univ Hlth Sci, Tokyo 1168551, Japan

[6] Hiroshima Inst Technol, Hiroshima 7315193, Japan

来源：

NUCLEAR INSTRUMENTS & METHODS IN PHYSICS RESEARCH SECTION A-ACCELERATORS SPECTROMETERS DETECTORS AND ASSOCIATED EQUIPMENT | 2003年 / 498卷 / 1-3期

基金：

日本学术振兴会;

关键词：

drift chamber beta-ray analyzer (DCBA); compact peripheral component interface (CompactPCI); flash analog to digital converter (FADC); double-beta decay;

D O I：

10.1016/S0168-9002(02)01997-6

中图分类号：

TH7 [仪器、仪表];

学科分类号：

0804 ; 080401 ; 081102 ;

摘要：

A flash analog to digital converter (FADC) board of low cost and power saving has been developed based on Compact Peripheral Component Interface (CompactPCI) for Drift Chamber Beta-ray Analyzer (DCBA), which is an experiment to study double-beta decay. This board has been designed and constructed with 8 channels, each of which has an 8-bit 100 MHz FADC chip and a double-buffered memory. The design philosophy using recent semiconductor technology is described together with the performance of the FADC board. (C) 2002 Elsevier Science B.V. All rights reserved.

引用

页码：430 / 442

页数：13

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