A 25.9-GHz voltage-controlled oscillator fabricated in a CMOS process.

被引:27
作者
Hung, CM [1 ]
Shi, L [1 ]
Lagnado, I [1 ]
机构
[1] Univ Florida, Dept Elect & Comp Engn, Silicon Integrated Circuits & Syst Res Grp SiMICS, Gainesville, FL 32611 USA
来源
2000 SYMPOSIUM ON VLSI CIRCUITS, DIGEST OF TECHNICAL PAPERS | 2000年
关键词
D O I
10.1109/VLSIC.2000.852862
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
A 25.9-GHz VCO has been demonstrated using 0.1-mu m NMOS transistors in a partially scaled CMOS process. The tuning range and output power level are 600 MHz and similar to -22 dBm. The phase noise at a 3-MHz offset is -106 dBc/Hz when the VCO core consumes 24 mW from a 1.5-V supply. This VCO uses a MOS varactor with Q > 20 at 26 GHz. Though Q is higher, due to the polysilicon gate depletion effect, the frequency tuning is not monotonic and a mechanism to limit the control voltage range is needed for PLL applications.
引用
收藏
页码:100 / 101
页数:2
相关论文
共 5 条
[1]   MODELING THE POLYSILICON DEPLETION EFFECT AND ITS IMPACT ON SUBMICROMETER CMOS CIRCUIT PERFORMANCE [J].
ARORA, ND ;
RIOS, R ;
HUANG, CL .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1995, 42 (05) :935-943
[2]  
CASTELLO R, 1998, VLSI S CIRC JUN, P34
[3]   High-Q capacitors implemented in a CMOS process for low-power wireless applications [J].
Hung, CM ;
Ho, YC ;
Wu, IC ;
O, K .
IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, 1998, 46 (05) :505-511
[4]  
HUNG CM, 2000, IN PRESS IEEE J SOLI
[5]  
HUNG CM, UNPUB FULLY INTEGRAT