Ultra thin (<3nm) high quality nitride/oxide stack gate dielectrics fabricated by in-situ rapid thermal processing

被引：32

作者：

Kim, BY ^{[1
]}

Luan, HF ^{[1
]}

Kwong, DL ^{[1
]}

机构：

[1] Univ Texas, Microelect Res Ctr, Dept Elect & Comp Engn, Austin, TX 78758 USA

来源：

INTERNATIONAL ELECTRON DEVICES MEETING - 1997, TECHNICAL DIGEST | 1997年

关键词：

D O I：

10.1109/IEDM.1997.650424

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this paper, ultra thin (< 3 nm) Si3N4/SiO2 stack layer with significant lower leakage current, superior boron diffusion barrier properties, and reliability compared with SiO2 of identical thickness have been fabricated by insitu RTP processing. These results demonstrate for the first time that ultra thin LPCVD Si3N4 can be used as gate dielectrics, contrary to those conclusions made previously on thicker LPCVD Si3N4.

引用

页码：463 / 466

页数：4

Ultra thin (&lt;3nm) high quality nitride/oxide stack gate dielectrics fabricated by in-situ rapid thermal processing

Ultra thin (<3nm) high quality nitride/oxide stack gate dielectrics fabricated by in-situ rapid thermal processing