Modeling and scaling of a-Si:H and poly-Si thin film transistors

被引：17

作者：

Shur, MS ^{[1
]}

Slade, HC ^{[1
]}

Ytterdal, T ^{[1
]}

Wang, L ^{[1
]}

Xu, Z ^{[1
]}

Hack, M ^{[1
]}

Aflatooni, K ^{[1
]}

Byun, Y ^{[1
]}

Chen, Y ^{[1
]}

Froggatt, M ^{[1
]}

Krishnan, A ^{[1
]}

Mei, P ^{[1
]}

Meiling, H ^{[1
]}

Min, BH ^{[1
]}

Nathan, A ^{[1
]}

Sherman, S ^{[1
]}

Stewart, M ^{[1
]}

Theiss, S ^{[1
]}

机构：

[1] Rensselaer Polytech Inst, Dept Elect Comp & Syst Engn, Troy, NY 12180 USA

来源：

AMORPHOUS AND MICROCRYSTALLINE SILICON TECHNOLOGY - 1997 | 1997年 / 467卷

关键词：

D O I：

10.1557/PROC-467-831

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

We have developed analytic SPICE models for hydrogenated amorphous silicon (a-Si:H) and polysilicon (poly-Si) thin film transistors (TFTs) which accurately model all regimes of operation, are temperature dependent to 150 degrees C, and scale with device dimensions. These models have been presented in [1, 2]. Tn this work, we compare the current-voltage characteristics predicted by our models with the measured characteristics from TFTs fabricated at different foundries. We compare the extracted device parameters in order to evaluate the robustness of our models and to determine a suitable default parameter set. We also use the models to examine the effects of device scaling for short channel TFTs. The models can be accessed using the circuit simulator AIM-Spice [3], which is available at http://nina.ecse.rpi.edu/aimspice.

引用

页码：831 / 842

页数：12