An effective methodology for thermal characterization of electronic packaging

In this study; an effective and novel methodology that integrates an infrared (IR) thermography measurement and three-dimensional (3-D) finite element (FE) model is proposed for thermal characterization of packages in a steady state under a natural convect-ion environment based on JEDEC specification [l]-[4]. To perform surface temperature measurement using an IR thermometer, the black paint coating is applied on the surface of packages so as to calibrate the surface radiation. The associated emissivity is approximately assessed using a simple calibration experiment, and moreover, - an appropriate thickness of the coating is determined. By using a typical 100-lead Thin Quad Flat package (TQFP) as the test vehicle, the proposed methodology, is benchmarked by a thermal test die measurement in terms of the junction-to-ambient (J/A) thermal resistance as well as the chip junction temperature. To demonstrate the accuracy of the benchmarked data from the thermal test die measurement, the corresponding uncertainty analysis is extensively performed. It is found that the worst possible uncertainty in the measured power, based on the specific power supply, is about 0.005 W and that in the chip junction temperature measurement is about 0.78degreesC. Additional studies are performed to evaluate the feasibility of the correlation models for convective heat transfer coefficients on the typical TQFP package, including Ellison [5], Aghazadeh and Mallik [6], Mulgaonker et al. [7], Edwards et al. [8], and Ridsdale et al. [9]. The obtained results derived from these modified correlation models are extensively verified against the experiment. It turns out that for a small device as the TQFP package, these correlation models are fairly reliable, and more importantly, the modified Edwards et al.'s model provides the best approximations.