Multi-level optimisation approach to switched capacitor filter synthesis

被引:5
作者
Alpaydin, G [1 ]
Erten, G
Balkir, S
Dündar, G
机构
[1] Naval Acad, Istanbul, Turkey
[2] Bogazici Univ, Dept Elect & Elect Engn, TR-80815 Bebek, Istanbul, Turkey
[3] Univ Nebraska, Walter Scott Engn Ctr 209N, Dept Elect Engn, Lincoln, NE 68588 USA
来源
IEE PROCEEDINGS-CIRCUITS DEVICES AND SYSTEMS | 2000年 / 147卷 / 04期
关键词
D O I
10.1049/ip-cds:20000395
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 [电气工程]; 0809 [电子科学与技术];
摘要
A multi-level optimisation approach to switched capacitor filter synthesis in which the top-down synthesis flow consists of high level and circuit level optimisers is presented. At high level, generalised macromodels of switched capacitor filter circuits are optimised to meet the given filter specifications. Parameters optimised at high level are treated as specifications for a circuit level optimiser, which is based on a novel algorithm that combines evolution strategies (ES) with simulated annealing. The optimisation strategy combines the advantages of SPICE-type simulations, neural performance models and knowledge-based approach in satisfying the constraints and specifications. The algorithmic details of the synthesis system are discussed in detail, and illustrative examples that demonstrate the validity of the approach are presented.
引用
收藏
页码:243 / 249
页数:7
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