Analysis of threshold voltage shift caused by bias stress in low temperature poly-Si TFTs
被引:37
作者:
Inoue, S
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机构:
Seiko Epson Corp, Base Technol Res Ctr, Nagano 392, JapanSeiko Epson Corp, Base Technol Res Ctr, Nagano 392, Japan
Inoue, S
[1
]
Ohshima, H
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h-index: 0
机构:
Seiko Epson Corp, Base Technol Res Ctr, Nagano 392, JapanSeiko Epson Corp, Base Technol Res Ctr, Nagano 392, Japan
Ohshima, H
[1
]
Shimoda, T
论文数: 0引用数: 0
h-index: 0
机构:
Seiko Epson Corp, Base Technol Res Ctr, Nagano 392, JapanSeiko Epson Corp, Base Technol Res Ctr, Nagano 392, Japan
Shimoda, T
[1
]
机构:
[1] Seiko Epson Corp, Base Technol Res Ctr, Nagano 392, Japan
来源:
INTERNATIONAL ELECTRON DEVICES MEETING - 1997, TECHNICAL DIGEST
|
1997年
关键词:
D O I:
10.1109/IEDM.1997.650439
中图分类号:
TM [电工技术];
TN [电子技术、通信技术];
学科分类号:
0808 ;
0809 ;
摘要:
The degradation phenomenon of low temperature (less than or equal to 425 degrees C) polycrystalline-silicon thin film transistors (poly-Si TFTs) caused by self-heating has been investigated. In n-channel TFTs, the subthreshold characteristics are significantly and rapidly shifted in the positive direction. This is particularly marked in wide channel TFTs and/or small size TFTs. in order to improve reliability, TFTs with divided channel patterns have also been introduced.