Design of a micro-UART for SoC application

被引：15

作者：

Ali, L ^{[1
]}

Sidek, R

Aris, I

Ali, AM

Suparjo, BS

机构：

[1] Univ Putra Malaysia, Dept Elect & Elect Engn, Serdang 43400, Selangor, Malaysia

[2] Univ Kebangsaan Malaysia, Dept Elect Elect & Syst Engn, Bangi, Selangor, Malaysia

来源：

COMPUTERS & ELECTRICAL ENGINEERING | 2004年 / 30卷 / 04期

关键词：

UART; HDL; FPGA; SoC; serial communication;

D O I：

10.1016/j.compeleceng.2003.01.002

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

This paper presents the design of a universal asynchronous receiver and transmitter (UART), which is fully functional and synthesizeable. Due to its modularity, configurability and extremely compact size, the proposed UART is named as micro-UART and it is ideal for system-on-a-chip (SoC) application. The core is usable as an intellectual property. Verilog hardware description language (HDL) in the Altera's MAX-PLUS II environment has been used for its design, compilation and simulation. The UART has been implemented using Altera's FPGA technology. (C) 2004 Elsevier Ltd. All rights reserved.

引用

页码：257 / 268

页数：12

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