共 15 条
[1]
Barzilai Z.(1983)Exhaustive Generation of Bit Patterns with Applications to VLSI Self-Testing IEEE Trans. on Comp. C-32 190-194
[2]
Coppersmith D.(1995)Built-In Test for Circuits with Scan Based on Reseeding of Multiple-Polynomial Linear Feedback Shift Registers IEEE Trans. on Comp. 44 223-233
[3]
Rosenberg A.L.(1989)Cellular Automata-Based Pseudorandom Number Generators for Built-In Self-Test IEEE Trans. on CAD 8 842-859
[4]
Hellebrand S.(1992)A Multiple Seed Linear Feedback Shift Register IEEE Trans. on Comp. 41 250-252
[5]
Rajski J.(undefined)undefined undefined undefined undefined-undefined
[6]
Tarnick S.(undefined)undefined undefined undefined undefined-undefined
[7]
Venkataraman S.(undefined)undefined undefined undefined undefined-undefined
[8]
Courtois B.(undefined)undefined undefined undefined undefined-undefined
[9]
Hortensius P.D.(undefined)undefined undefined undefined undefined-undefined
[10]
McLeod R.D.(undefined)undefined undefined undefined undefined-undefined