AN OPTIMIZED COMPENSATION STRATEGY FOR 2-STAGE CMOS OP AMPS

被引：39

作者：

PALMISANO, G

PALUMBO, G

机构：

[1] Dipartimento Electtrico Elettronico e Sistemistico, Facultà di Ingegneria, Universita di Catania

来源：

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-FUNDAMENTAL THEORY AND APPLICATIONS | 1995年 / 42卷 / 03期

关键词：

D O I：

10.1109/81.376869

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

An optimized compensation strategy for two-stage Miller-compensated CMOS operational amplifiers is presented. The output conductance of the buffer which avoids the right half-plane zero is profitably used to achieve a pole-zero compensation, Indeed, thanks to a proper choice of the buffer transconductance, the compensation for the pole due to the load capacitor is reached, thus providing better frequency performance.

引用

页码：178 / 182

页数：5

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